Discontinuous decoupled SVPWM schemes for a four-level open-end winding induction motor drive with waveform symmetries
Abstract: A four-level open-end winding induction motor drive (OEWIMD) is realised by feeding the open stator windings of a three-phase induction motor from either end with two-level voltage source inverters (VSIs). These VSIs are operated with unequal DC-link voltages, which are in the ratio of 2:1. This circuit configuration has the disadvantage of overcharging the DC-link capacitor of the inverter operated with the lower input voltage. Decoupled space vector pulse-width modulation (DSVPWM) schemes, which were suggested in the previous literature to circumvent this problem, result in higher switching power loss in the dual-inverter topology. It is known that the discontinuous pulse-width modulation (PWM) schemes reduce the switching power loss. However, lack of structural symmetry of the power circuit renders it unwieldy to devise these PWM schemes. This study explores the applicability of discontinuous decoupled SVPWM (DDPWM) techniques for the four-level OEWIMD, without compromising on the waveform symmetries. With the aid of an improvised loss model, it is shown that these PWM schemes achieve the reduction of the overall loss of the four-level OEWIMD compared to the DSVPWM schemes. It has also been observed that one of the proposed DDPWM schemes result in reduced dv'dt in the motor phase voltages.
VLSI Projects,IEEE VLSI Projects,latest vlsi projects,2018 VLSI Projects,VLSI Projects in Bangalore,VLSI projects institutes in bangalore,VLSI live projects in bangalore,VLSI academic projects,VLSI project centres,M.Tech VLSI projects in bangalore,M Tech VLSI projects institutes in bangalore,FPGA projects in bangalore,ieee vlsi,vlsi ieee papers,mtech vlsi,fpga projects using vhdl,mini project on image processing,vlsi paper,vlsi ieee papers,ieee project papers,vlsi institutes in bangalore,ofdm projects,vlsi projects using vhdl,projects based on digital signal processing,vhdl based projects,latest vlsi projects,vlsi project institutes in bangalore,VLSI Project,vlsiproject,vlsi project institute in bangalore,vlsi project idea,idea in vlsiproject,idea in vlsiprojects,idea in vlsi project,idea in vlsiprojects,M.Tech VLSI Projects in Bangalore,M.Tech FPGA Projects in Bangalore,ECE VLSI Projects in Bangalore,VLSI Academic Projects in Bangalore,VLSI Live Projects in Bangalore,VLSI Real Time Projects in Bangalore,VLSI Projects for MTech 2018,VLSI Projects for MTech 2018,VLSI Projects for MTech in Bangalore,FPGA based Projects for M.Tech,download 2018 VLSI Project list,VLSI project centre,VLSI academic projects,vlsi ieee papers,new vlsi projects,mtech vlsi,fpga projects using vhdl,mini project on image processing,vlsi paper,vlsi ieee papers,ieee project papers,vlsi institutes in bangalore,ofdm projects,vlsi projects using vhdl,projects based on digital signal processing,vhdl based projects,latest vlsi projects,vlsi project institute in bangalore,vlsi project idea,idea in vlsiproject,idea in vlsiprojects,idea in vlsi project,idea in vlsiprojects
del.icio.us
Google