Low-Computing-Load, High-Parallelism Detection Method Based on Chebyshev Iteration for Massive MIMO Systems With VLSI Architecture
Abstract: Minimum-mean-square-error (MMSE) detection is becoming increasingly relevant in signal detection for massive multiple-input-multiple-output systems because of the increasing numbers of both users and antennas. This paper proposes a signal detection method called parallelizable Chebyshev iteration (PCI) that reduces the computing load and explores the potential parallelism of matrix inversions and multiplications, which are both major issues in MMSE detection. First, an eigenvalueapproximation-based method is used to obtain an initial solution. Then, optimized Chebyshev iteration is applied for the approximate computation of matrix inversions and multiplications. The number of multiplications is reduced from C)(BU2 + U3) to C)(KBU),where B, U, and K are the numbers of antennas, users and iterations, respectively. The PCI method eliminates the correlations in large-scale matrix inversions and multiplications, thereby improving the parallelism among elements of the estimated vector. These improvements are achieved at the cost of a minor reduction in detection accuracy. Based on the PCI method, a very-large-scaleintegration fully pipelined architecture is proposed to realize 128 × 16 64-QAM MMSE detection. Here, the iterative parameters are obtained through approximate computations and are used repeatedly, and the user-level pipeline processing pattern achieves an optimal tradeoff amongthe throughput, area, and power. This architecture was verified on an FPGA, and the layout was implemented using TSMC 65 nm 1P9M CMOS technology. Results of 2.46 Gbps/W (throughput/power) and 0.53 Gbps/mm2 (throughput/area) were obtained, which represent increases of 4.56 × and 3.79×, respectively, compared with current state-of-the-art designs.
VLSI Projects,IEEE VLSI Projects,latest vlsi projects,2018 VLSI Projects,VLSI Projects in Bangalore,VLSI projects institutes in bangalore,VLSI live projects in bangalore,VLSI academic projects,VLSI project centres,M.Tech VLSI projects in bangalore,M Tech VLSI projects institutes in bangalore,FPGA projects in bangalore,ieee vlsi,vlsi ieee papers,mtech vlsi,fpga projects using vhdl,mini project on image processing,vlsi paper,vlsi ieee papers,ieee project papers,vlsi institutes in bangalore,ofdm projects,vlsi projects using vhdl,projects based on digital signal processing,vhdl based projects,latest vlsi projects,vlsi project institutes in bangalore,VLSI Project,vlsiproject,vlsi project institute in bangalore,vlsi project idea,idea in vlsiproject,idea in vlsiprojects,idea in vlsi project,idea in vlsiprojects,M.Tech VLSI Projects in Bangalore,M.Tech FPGA Projects in Bangalore,ECE VLSI Projects in Bangalore,VLSI Academic Projects in Bangalore,VLSI Live Projects in Bangalore,VLSI Real Time Projects in Bangalore,VLSI Projects for MTech 2018,VLSI Projects for MTech 2018,VLSI Projects for MTech in Bangalore,FPGA based Projects for M.Tech,download 2018 VLSI Project list,VLSI project centre,VLSI academic projects,vlsi ieee papers,new vlsi projects,mtech vlsi,fpga projects using vhdl,mini project on image processing,vlsi paper,vlsi ieee papers,ieee project papers,vlsi institutes in bangalore,ofdm projects,vlsi projects using vhdl,projects based on digital signal processing,vhdl based projects,latest vlsi projects,vlsi project institute in bangalore,vlsi project idea,idea in vlsiproject,idea in vlsiprojects,idea in vlsi project,idea in vlsiprojects
del.icio.us
Google