IEEE 2018 VLSI Projects
1.High-Density Shift-Register-Based Rapid Single-Flux-Quantum Memory System for Bit-Serial
Microprocessors
2.Area-Efficient SOT-MRAM With a Schottky Diode
3.2.31-Gb/s/ch Area-Efficient Crosstalk Canceled Hybrid Capacitive Coupling Interconnect for 3-D
Integration
4.An area-efficient partially reconfigurable crossbar switch with low reconfiguration delay
5.FTCAM: An Area-Efficient Flash-Based Ternary CAM Design
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